Low-power, high-performance LVDS (low-voltage differential signaling) buffer-repeater devices that boost the signal integrity of field-programmable gate arrays (FPGAs) and application specific integrated circuits (ASICs) across backplanes and cables in telecom, datacom, industrial, medical, automotive and office imaging applications, have been developed by National Semiconductor Corp., Santa Clara CA.
DS90LV004 and SCAN90004 1.5Gbps four-channel buffers include configurable output pre-emphasis, hot-plug protection and 15kV of electrostatic discharge (ESD) protection.
For designers who want to implement system-level test, SCAN90004 includes IEEE 1149.6 (JTAG) test capability, to verify high-speed differential connections in the system.
“The DS90LV004 and SCAN90004 dramatically improve the performance of a wide variety of designs driving high-speed signals,” said Jeff Waters, product line director for the Interface division at National. “In FPGA- and ASIC-based designs, for example, these buffers can provide ESD protection up to 15 kV and deliver higher-speed and longer-reach signals over lower-cost cables and backplanes.”
DS90LV004 drives up to four LVDS clock and/or data channels over common backplanes or simple cable configurations. The wide differential input range easily interfaces to LVDS, low voltage positive emitter-coupled logic (LVPECL) or current mode logic (CML) input levels and the output levels are fully LVDS compliant, National says.
Configurable output pre-emphasis allows the designer to overdrive outputs to compensate for a lossy interconnect. The 15kV ESD protection provides maximum isolation of expensive FPGAs, ASICs and other onboard components. A power-down mode is useful in minimizing power consumption when all four channels of a single device are not active, as in redundancy applications.
SCAN90004 has same capabilities as DS90LV004, includes IEEE standard 1149.1 and 1149.6 JTAG to extend the capability of an existing system or board-level JTAG bus to high-speed mixed-signal environments.
